2163 Commits

Author	SHA1	Message	Date
azazeal04	a439638cdf	Merge 49fef1697c into 55ebd287ee	2026-04-11 18:06:57 -07:00
comfyanonymous	55ebd287ee	Add a supports_fp64 function. (#13368)	2026-04-11 21:06:36 -04:00
Jukka Seppänen	a134423890	SDPose: resize input always (#13349)	2026-04-10 11:26:55 -10:00
huemin	b615af1c65	Add support for small flux.2 decoder (#13314)	2026-04-07 03:44:18 -04:00
comfyanonymous	40862c0776	Support Ace Step 1.5 XL model. (#13317)	2026-04-07 03:13:47 -04:00
azazeal04	49fef1697c	Replace empty tensor initialization with zeros	2026-04-04 20:21:27 +02:00
azazeal04	5d119f0532	Implement allow_fp16 configuration in model detection ... Add logic to set allow_fp16 based on weight standard deviation	2026-04-04 20:09:10 +02:00
azazeal04	b2e08bb963	Avoid overwriting existing keys in state_dict ... Prevent overwriting existing keys when mapping t_embedder_2 keys to t_embedder.	2026-04-04 20:05:17 +02:00
azazeal04	6965b83a2a	Fix condition and update transformer_options handling	2026-04-04 19:57:37 +02:00
azazeal04	479536e34d	Prevent overwriting existing keys in state_dict ... Ensure new key is added only if it doesn't exist.	2026-04-04 19:45:05 +02:00
azazeal04	a73ac772b5	Fix key mapping for t_embedder compatibility ... Ensure compatibility by mapping keys for t_embedder.	2026-04-04 19:42:55 +02:00
azazeal04	5f041f4e5e	Refactor time embedding and projection layers	2026-04-04 19:38:55 +02:00
azazeal04	de2ff57f3c	Implement _compute_twinflow_adaln method ... Added a method to compute TwinFlow adaLN input with delta-time conditioning.	2026-04-04 18:49:19 +02:00
azazeal04	4fe75dcce8	Add configuration for TwinFlow-Z-Image model	2026-04-04 17:23:46 +02:00
azazeal04	fec629ba3d	Implement twinflow_z_image function	2026-04-04 16:09:22 +02:00
azazeal04	e978c61a79	Implement twinflow_z_image_key_mapping function ... Add twinflow_z_image_key_mapping function for key mapping.	2026-04-04 16:06:41 +02:00
azazeal04	b76510b549	Add TwinFlow_Z_Image model to supported models	2026-04-04 16:03:52 +02:00
azazeal04	dc413071ff	Add functions to check and extract TwinFlow-Z-Image config	2026-04-04 15:59:50 +02:00
azazeal04	84c983a779	Add detection for TwinFlow-Z-Image checkpoints	2026-04-04 15:57:19 +02:00
azazeal04	21ed4a2242	Add TwinFlow_Z_Image class to model_base.py ... Added TwinFlow_Z_Image class for new model integration.	2026-04-04 15:55:09 +02:00
azazeal04	02b5222dcc	Add twinflow_z_image_lora_to_diffusers function	2026-04-04 15:51:35 +02:00
azazeal04	00c4e72a97	Implement TwinFlow-Z-Image LoRA compatibility ... Add compatibility for TwinFlow-Z-Image LoRAs to target t_embedder_2.* keys.	2026-04-04 15:49:32 +02:00
comfyanonymous	0c63b4f6e3	Remove dead code. (#13251)	2026-04-01 20:22:06 -04:00
comfyanonymous	e2ddf28d78	Fix some fp8 scaled checkpoints no longer working. (#13239)	2026-03-31 14:27:17 -07:00
rattus	8d723d2caa	Fix/tweak pinned memory accounting (#13221) ... * mm: Lower windows pin threshold Some workflows have more extranous use of shared GPU memory than is accounted for in the 5% pin headroom. Lower this for safety. * mm: Remove pin count clearing threshold. TOTAL_PINNED_MEMORY is shared between the legacy and aimdo pinning systems, however this catch-all assumes only the legacy system exists. Remove the catch-all as the PINNED_MEMORY buffer is coherent already.	2026-03-29 16:43:24 -07:00
Jukka Seppänen	a500f1edac	CORE-13 feat: Support RT-DETRv4 detection model (#12748)	2026-03-28 23:34:10 -04:00
comfyanonymous	3f77450ef1	Fix #13214 (#13216)	2026-03-28 22:35:59 -04:00
rattus	b353a7c863	Integrate RAM cache with model RAM management (#13173)	2026-03-27 21:34:16 -04:00
comfyanonymous	3a56201da5	Allow flux conditioning without a pooled output. (#13198)	2026-03-27 20:36:26 -04:00
Jukka Seppänen	b0fd65e884	fix: regression in text generate with LTXAV model (#13170)	2026-03-26 09:55:05 -07:00
comfyanonymous	2a1f402601	Make Qwen 8B work with TextGenerate node. (#13160)	2026-03-25 23:21:44 -04:00
Jukka Seppänen	404d7b9978	feat: Support Qwen3.5 text generation models (#12771)	2026-03-25 22:48:28 -04:00
Kohaku-Blueleaf	5ebb0c2e0b	FP8 bwd training (#13121)	2026-03-24 20:39:04 -04:00
Jukka Seppänen	e87858e974	feat: LTX2: Support reference audio (ID-LoRA) (#13111)	2026-03-23 18:22:24 -04:00
Talmaj	d49420b3c7	LongCat-Image edit (#13003)	2026-03-21 23:51:05 -04:00
rattus	25b6d1d629	wan: vae: Fix light/color change (#13101) ... There was an issue where the resample split was too early and dropped one of the rolling convolutions a frame early. This is most noticable as a lighting/color change between pixel frames 5->6 (latent 2->3), or as a lighting change between the first and last frame in an FLF wan flow.	2026-03-21 18:44:35 -04:00
comfyanonymous	11c15d8832	Fix fp16 intermediates giving different results. (#13100)	2026-03-21 17:53:25 -04:00
comfyanonymous	b5d32e6ad2	Fix sampling issue with fp16 intermediates. (#13099)	2026-03-21 17:47:42 -04:00
Jedrzej Kosinski	87cda1fc25	Move inline comfy.context_windows imports to top-level in model_base.py (#13083) ... The recent PR that added resize_cond_for_context_window methods to model classes used inline 'import comfy.context_windows' in each method body. This moves that import to the top-level import section, replacing 4 duplicate inline imports with a single top-level one.	2026-03-20 20:03:42 -04:00
drozbay	589228e671	Add slice_cond and per-model context window cond resizing (#12645) ... * Add slice_cond and per-model context window cond resizing * Fix cond_value.size() call in context window cond resizing * Expose additional advanced inputs for ContextWindowsManualNode Necessary for WanAnimate context windows workflow, which needs cond_retain_index_list = 0 to work properly with its reference input. ---------	2026-03-19 20:42:42 -07:00
rattus	f49856af57	ltx: vae: Fix missing init variable (#13074) ... Forgot to push this ammendment. Previous test results apply to this.	2026-03-19 22:34:58 -04:00
rattus	82b868a45a	Fix VRAM leak in tiler fallback in video VAEs (#13073) ... * sd: soft_empty_cache on tiler fallback This doesnt cost a lot and creates the expected VRAM reduction in resource monitors when you fallback to tiler. * wan: vae: Don't recursion in local fns (move run_up) Moved Decoder3d’s recursive run_up out of forward into a class method to avoid nested closure self-reference cycles. This avoids cyclic garbage that delays garbage of tensors which in turn delays VRAM release before tiled fallback. * ltx: vae: Don't recursion in local fns (move run_up) Mov the recursive run_up out of forward into a class method to avoid nested closure self-reference cycles. This avoids cyclic garbage that delays garbage of tensors which in turn delays VRAM release before tiled fallback.	2026-03-19 22:30:27 -04:00
comfyanonymous	8458ae2686	Revert "fix: run text encoders on MPS GPU instead of CPU for Apple Silicon (#…" (#13070) ... This reverts commit b941913f1d.	2026-03-19 15:27:55 -04:00
Jukka Seppänen	fd0261d2bc	Reduce tiled decode peak memory (#13050)	2026-03-19 13:29:34 -04:00
rattus	ab14541ef7	memory: Add more exclusion criteria to pinned read (#13067)	2026-03-19 10:03:20 -07:00
rattus	fabed694a2	ltx: vae: implement chunked encoder + CPU IO chunking (Big VRAM reductions) (#13062) ... * ltx: vae: add cache state to downsample block * ltx: vae: Add time stride awareness to causal_conv_3d * ltx: vae: Automate truncation for encoder Other VAEs just truncate without error. Do the same. * sd/ltx: Make chunked_io a flag in its own right Taking this bi-direcitonal, so make it a for-purpose named flag. * ltx: vae: implement chunked encoder + CPU IO chunking People are doing things with big frame counts in LTX including V2V flows. Implement the time-chunked encoder to keep the VRAM down, with the converse of the new CPU pre-allocation technique, where the chunks are brought from the CPU JIT. * ltx: vae-encode: round chunk sizes more strictly Only powers of 2 and multiple of 8 are valid due to cache slicing.	2026-03-19 09:58:47 -07:00
comfyanonymous	f6b869d7d3	fp16 intermediates doen't work for some text enc models. (#13056)	2026-03-18 19:42:28 -04:00
comfyanonymous	56ff88f951	Fix regression. (#13053)	2026-03-18 18:35:25 -04:00
Jukka Seppänen	9fff091f35	Further Reduce LTX VAE decode peak RAM usage (#13052)	2026-03-18 18:32:26 -04:00
comfyanonymous	dcd659590f	Make more intermediate values follow the intermediate dtype. (#13051)	2026-03-18 18:14:18 -04:00